1. Field of the Invention
The present invention relates generally to the integration of fluorinated materials with a low dielectric constant (low-K) into an inter-layer dielectric ("ILD"). The present invention relates more particularly to integrating fluorosilicate glass ("FSG") or SiOF as a gapfill layer in an ILD, to thereby obtain the benefit of a low-K to improve device performance.
2. Description of the Related Art
U.S. patent application Ser. No. 09/157,240, filed on Sep. 18, 1998, deals with related technology. That application is entitled "Surface Treatment of Low-K SiOF to Prevent Metal Interaction" by Richard J. Huang and is assigned to Advanced Micro Devices.
U.S. patent application Ser. No. 09/203,572 filed Dec. 2, 1998 deals with related technology. That application is entitled "Integration of Low-K SiOF as Inter-layer Dielectric" by Richard J. Huang and is assigned to Advanced Micro Devices. The attorney docket number for that application is 39153/132.
Fluorinated SiO.sub.2, typically provided by way of plasma enhanced chemical vapor deposition ("PECVD") or by way of high density plasma ("HDP"), can be used to lower the dielectric constant of SiO.sub.2 from, for example, 4.0 to 3.5-3.8. The lowering of the dielectric constant is advantageous for a number of reasons, including the reduction of the capacitance of a semiconductor device, which results in an improved performance of the semiconductor device.
However, fluorine in SiO.sub.2 will react with physical vapor deposition ("PVD") or chemical vapor deposition ("CVD") barrier metals, such as Ti, TiN, Ta, TaN, etc., which are subsequently deposited on the surface of the fluorinated SiO.sub.2. This reaction between fluorine and the barrier metals will cause delamination of the barrier metals on both the flat SiOF surfaces, as well as inside the vias. Both of these occurrences are disadvantageous.